1. Field of the Invention
The present invention relates to a semiconductor module configured to seal a semiconductor chip mounted on a substrate using an encapsulation resin. More particularly, the present invention relates to a semiconductor module having a structure for suppressing overflowing of the encapsulation resin from a predetermined region of the substrate when sealing the semiconductor chip with the encapsulation resin.
2. Description of the Related Art
Recently, as electronic devices have undergone reduction in thickness and size, needs for reduction in weight and thickness have increased sharply for semiconductor modules constituting the electronic devices. One of semiconductor module mounting methods for satisfying these needs is COB (Chip On Board), which has come into practical use in many fields as is known.
Generally, the semiconductor module of COB type is constructed such that a semiconductor chip is mounted and fixed on a substrate on which a wiring pattern has been formed, the semiconductor chip is then connected to a wiring pattern, and the semiconductor chip is then sealed with an encapsulation resin so as to completely cover the semiconductor chip, a gold wire and a bonding connecting portion. Connection of the semiconductor chip to the wiring pattern is established by, for example, wire bonding by a gold wire.
As an encapsulation resin, an encapsulation resin having flowability, such as an epoxy resin, is generally used not only for sealing all the parts but also for employing a method of high-yield production such as a dispenser method or a printing method.
However, use of an encapsulation resin having flowability, such as an epoxy resin, has a disadvantage that the encapsulation resin flows out to an unintended area, so that a resin region cannot be formed within a certain area. This has been a factor of hindering further reduction in size.
For solving the problems described above, various methods were proposed in the past. They include, for example, a method in which a silk dam is formed on the periphery of a chip to provide a bank, a method in which a mold is provided, a resin is poured into the mold, the resin is then cured and the mold is removed, and a method in which a bank-shaped pattern is formed with a solder resist coated on the surface of a substrate to provide a stemming structure.
Above all, the method by a solder resist is very effective, since there is no additional cost element and the solder resist can be easily formed in the substrate production process. The structure is discussed in, for example, Japanese Patent Application Laid-Open No. H11-135685.
FIGS. 7A and 7B illustrate a schematic diagram of a semiconductor module having the resin stemming structure discussed in Japanese Patent Application Laid-Open No. H11-135685. FIG. 7A is a plan view and FIG. 7B is a sectional view taken along line 7B-7B in FIG. 7A.
The semiconductor module includes a substrate 601, a semiconductor chip 607 mounted at a predetermined position on the substrate, a bonding wire 608 connecting the semiconductor chip to a wiring pattern 603 on the substrate, and an encapsulation resin 609 for sealing the semiconductor chip and the bonding wire.
The substrate 601 includes an insulating substrate 602 and a wiring pattern 603 thereon, and a solder resist 604 is formed on the tip surface of the wiring pattern. Further, the solder resist 604 is provided with a solder resist annular portion 605 formed so as to surround the semiconductor chip and a connecting portion between the semiconductor chip and the wiring pattern 603 and a solder resist removal portion 606 on areas inside and outside the solder resist annular portion. Namely, by providing the solder resist removal portion, a step shape is formed at the outer edge of the solder resist annular portion, and overflowing of the encapsulation resin is suppressed by a surface tension generated in the step shape portion.
Japanese Patent Application Laid-Open No. 2004-327851 discusses a construction configured to stem an encapsulation resin with a wiring pattern.
However, the construction and production method discussed in Japanese Patent Application Laid-Open No. H11-135685 have a disadvantage that in a portion in which a wiring pattern and a solder resist annular portion cross each other and in the vicinity of the portion, an encapsulation resin tends to overflow from the cross portion.